Memory Layout Lead

ACL Digital

Bangalore, KarnatakaFull Time9/26/2026Active listing

Job description

Memory Layout Engineer | ACL Digital Location: Bangalore ⏳ Experience: 7 Years ⏱️ Notice Period: 0–30 Days We are hiring an experienced Memory Layout Engineer to design and optimize high-density memory architectures (SRAM/DRAM/HBM/Flash) on advanced sub-5nm process nodes (FinFET/GAAFET). In this role, you will lead custom block floorplanning, execute matched differential routing for word/bit lines, and ensure zero-error physical verification (DRC, LVS, ERC). You will collaborate closely with c…

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