35 open roles11 companies hiring
Demand score
35 jobs · 11 companies · 8 added / 30d
VLSI Timing Methodology Intern - Summer 2027
NVIDIA US, CA, Santa Clara Full-time 1d ago
ASIC Digital Lead - ATPG & Methodology (f/m/div.)
Bosch Group Reutlingen Full-time 3d ago
Senior Valuation Methodology Lead, Global Markets (Flexible)
Standard Chartered Bank Singapore Full-time 4d ago $2,160–$2,880/mo
ASIC Engineer || Physical Design, CAD Methodology || STA Setup, Convergence Methodology || Exp 4+ years
Cisco Systems Bangalore, India Full-time 4d ago
Senior Physical Design Methodology Engineer, PPA Improvement Technology Scaling
NVIDIA 2 Locations Full-time 10/29/2026
Senior JTAG Methodology Engineer
NVIDIA US, CA, Santa Clara Full-time 10/27/2026
Senior Technical Program Manager – DFX Software Methodology
NVIDIA US, CA, Santa Clara Full-time 10/15/2026
Post-Silicon Validation and Methodology Engineer
NVIDIA US, CA, Santa Clara Full-time 10/14/2026